Single-electron tunneling or charging has been proposed as a basis for the room temperature operation of electronic devices in which nanometer size particles serve as the functional or active elements of the device. Such devices have a number of proposed advantages over bulk size electronic devices. These advantages include negligible power consumption, faster computation or tasking abilities, greatly increased device element densities, and the potential for multiple status states rather than just "on" or "off" states.
One promising route to the fabrication of single-electron devices is the use of nanometer size metal and semiconductor particles as active device elements. Passivated nanoparticles of coinage metals may be particularly useful for these devices.
For single-electron charging to be observed in such devices the following conditions must be met: (1) The active elements of the device must have finite charging energies for a single electron. This charging energy (E=e.sup.2 /2C) is large when the electrical capacitance (C) of the functional elements of the device is small. Usually, a small capacitance implies small physical dimensions of the device; and (2) The charging energy of the device must be at least a few times greater than the thermal energy at the temperature at which the device is to be operated (E&gt;&gt;kT). For operation above a few degrees K, this criterion implies that the device must have a charging energy that is greater than a few millivolts. For operation at 77.degree. K (liquid nitrogen temperature) a single-electron charging energy on the order of 0.10 V is desirable.
Two main approaches to the fabrication of single-electron devices have been developed. The first, a "top-down" approach, is to use state-of-the-art electron beam lithography techniques and semiconductor processing technologies to produce very small tunneling junctions. These junctions may be made of two metal conductors with an insulating gap between them, or alternatively, they made be made of a semiconductor quantum dot structure, which may also have a very small capacitance. Such devices can be reduced down to the 100 nm size range and have capacitances as low as 10.sup.-17 F. However, these devices have two basic limitations: 1) they exhibit single-electron charging only at very low temperatures (T.ltoreq.4.degree. K), thus rendering them ineffective under normal operating conditions; 2) large scale production of these nanoelectronic devices is very difficult to achieve because they are fabricated by serial rather than parallel processes.
A variant of the top-down approach for fabricating single-electron devices is the hybrid approach in which a voltage threshold-shifting, single transistor memory device is used. Fabrication is by conventional n-MOS transistor processes, with the exception that the introduction of the nanocrystals was achieved by limited nanocrystal seeding followed by deposition of a control oxide. The resulting device is essentially a silicon field-effect transistor (FET) with a random arrangement of nanocrystals of silicon or germanium (1-10 nm) placed in the gate oxide region in close proximity to the inversion surface. Injection of electrons into the nanocrystals occurs from the inversion layer via direct tunneling when the control gate is forward biased with respect to the source and drain. The resulting stored charge on the nanocrystals causes a shift in the threshold voltage of the device. Although this device is characterized by fast read and write times as well as long charge retention times, its use is limited because of the lack of control over the size and size distribution and the disordered geometric arrangement of the nanocrystals used, which leads to unpredictable and inconsistent device performance.
Furthermore, the use of semiconductor nanocrystals rather than metal nanocrystals results in the energy level spectrum of the device being quite complicated. Classical electrostatics, as well as the discrete energy level spectrum of the band structure that arises from quantum confinement of carriers, must be taken into account in the case of semiconductor nanocrystals. For metal nanocrystals, on the other hand, the energy level spectrum of the device would be governed by simple electrostatics. Another limitation of the semiconductor nanocrystal device is that the lack of control over the size, size distribution, and ordering of the nanocrystals can result in serious complications for device operation especially for multistate operation. This is due to the strong influence of these parameters on the potential energy of the stored electrons, the transmission efficiency for the storage from the inversion layer, and the coulombic energy that discourages the injection and storage of more electrons.
The second main approach used to construct single-electron devices, termed a "bottom-up" approach, is to fabricate them from molecular or atomic precursors by precisely positioning and assembling the nanometer size building blocks into patterned arrays. This first involves the use of one of a number of chemical schemes for preparing the nanoparticles. Techniques such as chemical vapor deposition (CVD), chemical synthesis, chemical self-assembly, and molecular recognition have been used. Second, the materials are arranged into patterned arrays by using one of a variety of methods that include scanning tunneling microscopy (STM), Langmuir-Blodgett film preparation, self-assembly, spin-coating, and the like. In general, the tasks of synthesizing the requisite materials and placing them into specific chemical environments or geometric arrangements are nontrivial.
Single-electron charging in granular metal films at liquid helium temperature (4.degree. K) has been observed. These films were produced by vacuum deposition of the metal vapor on an insulating substrate, the deposited metal forming isolated, random islands on the substrate. Such particles are typically disc-shaped with diameters of the order of 10 nm or more and capacitances of the order of 10.sup.-18 to 10.sup.-17 F. Films produced by this method are highly disordered and the particles are characterized by broad relative size distributions (typically, .sigma..congruent.50%). These limitations result in inconsistent electron charging effects in the metal films.
Single-electron charging at room temperature of individual colloidal metal nanocrystals supported on a surface has been observed by the use of Scanning Tunneling Microscopy (STM). Small, colloidal metal particles are characterized by size-dependent charging energies which, for a 2 nm particle, are about 0.3 V in vacuum. However, although displaying the anticipated physical phenomena the practical utilization of such colloidal metal particles has not been realized.
The conductance of a particle monolayer measured transversely along the layer and current/voltage curves have been obtained. However, no proof of single-electron tunneling or charging has been shown for such monolayers. In addition, use of spin casting techniques to form the layer of particles make possible only limited control over array structure.
It would therefore be advantageous to provide single-electron solid state electronic devices that are not characterized by the limitations discussed previously.